IBM 2025 Maintenance Manual page 64

Processing unit
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1403 Carriage Data Out (PRC)
1101
0
Skii;:
1
Carriage control 8
2
Carriage control 4
3
Carriage control 2
4
Carriage control 1
5
0
6
Set carr-busy if 6-7 beth
7
set
carr-tusy if 6-7 both
1110
Unassigned
1403 PLEAR Data out CPR)
1111
0
PLB
AR
data out 128
1
PLB AR data out 64
2
PI.B AR data out 32
3
PLB
AR
data out 16
4
PI.B AR data out
8
5
PLB
AR
data out 4
6
PLB AR
data
out 2
7
PLB
AR
data out 1
Ext~n.s:!l
Field Definitions, Console
Prin-ter-Ke~board
Mode (EXT to CPU)
ocoo
Unassigned
0001
Unassigned
Storage Protect 0 (S'IPO)
MOM 4-41
0010
0
STPO bit 0 (QO)
1
STPO bit 1 (Ql)
2
STPO bit 2 (Q2)
3
STPO bit 3 (Q 3)
4
STPO bit 4 (Q4)
5
STPO bit 5 ( Q5)
6
STPO bit 6 (Q6)
7
S'IPO bit
7
(Q7)
Storage Protect 1
(STPl)
MDM 4-41
0011
0
STPl bit 0
1
STPl bit 1
2
STPl
bit
2
3
STPl bit
3
4
S'IP1 bit 4
5
STPl bit
5
6
S'IPl bit 6
7
S'IPl
bit 7
1-54 (7/69)
en
on
Dynamic Condi ti on Register CDYN)
~DM
4-40
0100• 0
1
2
3
4
5
6
7
Z=O
Storage wrap latch
CVFL (overflow)
Adder carry
Not hold in (Dir ctl Feat)
check disable switch
DYN Reg bit 6 CHZ=O)
DYN Reg tit 7 (LZ=O)
Status Register ( S)
MOM 4-16
0101* 0
1
2
3
4
5
6
1
so
True/compl latch
Sl Z=nonzero (all arith ops)
S2 Z=nonzero Clog, dee,
&
bin ops)
S3 ALU 0-bit carry
S4 Invalid decirral digit
SS (general puri;:ose)
S6 Not execute
S7 Not exceptional condition
MMSK Register, Bits 0-7 (MMSK)
MDM 4-15
0110*
0
1
2
3
4
5
6
7
~~BKO
Channel high trap
~MSKl
2311 disk control trap
MMSK2 Channel low trap
z..'.MSK3 2540 reader trap
MMSK4 2540 punch trap
MMSKS Corm: chnl bit service
z..'.MSK6 Comm chnl char service
MMSK7 Level
1
~ricrity
hold
Branch Conditions (BA)
MDM 4-40
0111* 0
Chnl 0 interruption
1
Mode bit 0
2
Mode bit 1
3
Mode bit
2
4
IPL latch
5
LS zone 0
6
LS zone 1
7
LS zcne
2
1000
Unassigned
1001
Unassigned
10 52 Data In CTI)
MOM
4-73
latch
1010
0
Uppercase store latch Cbits 0-1)
1
Uppercase store latch Cbits 0-1)
2
KB bit
B
3
KB bit A
4
KB bit
8
5
KB Ht 4
6
KB bit
2
7
KB bit 1
P
KB bit C

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