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1.25.2.4 Array X and Y Drive Line Checking
With the aid of MDM 4-27
(Part 4 cf 5) and
AID pages 1".08 60-?·i:D891, any of the 136
Y-array wires or the 128 X Csecticns 0-8K
er 8-16K) array wires can be ascertained.
SAR tits 2-8 select the Y-lines (SAR bit
8 being the least significant).
SAR bits
9-14 select the x-lines (SAR bit 14 being
the least significant).
SAR bit 1 selects
the 0-8K or 8-16K section of the array; the
8-16K section is selected when tit 1 is a
1.
SAR bit 15 is ignored.
The
f
cllowing example illustrates
checking the continuity of any array drive
line without first having to unplug the
array.
If an open Y-drive line is
sus~ected,
determine SAR bits 2-8.
If, for exarrrle,
they are 1011111, then reference to MCM
4-27 (Part 4 of 5) shows the Y-drive line
to be 138, c-side.
This particular drive
line can be traced to storage logic pages
MD412 and MD452.
The continuity of array drive line 138
is checked ty placing the leads of an
ohrrmeter tetween C-B2E2J02 and C-B2S2J04.
The forward resistance is usually between
3.6 kilohms and 4.0 kilohms (that is, two
array diodes in series).
The de resistance
of the array line itself is approximately
12 ohms.
The reverse resistance is
normally greater than lOOK ohms.
The X-lines have forward resistance of
3.6 kilohms, which is measured with the
5808198 cards still plugged in.
The
forward resistance is similar to that of
any Y-line when these cards are removed.
1.26 lCCAL STORAGE DIAGNOSTIC AIDS
Figures 1-133 through 1-141 sho-w the
waveforms for local storage (LS).
Figures
1-140 and 1-141 show bad waveforms.
Pl Time
(Sync)
uo
=
uo
+ 11 [6093]
0 -
pt+++tt++t-t-fi~~w.+-....,~~-~~~~~~
-
P 1 Time (A-B 1L7B10)
0-
- XO Address Line (A-B 1 E6D09)
40 ns/Div.
2 Volts/cm
Xo
Address Line
Figure 1-133.
LS-Addressing (Pl-Time Access)
2025 FEMM (7/69}
1-135
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