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cont ig ura tion card wi 11 be fUnched
continuously in EBCDIC forrrat.
It shculd
be inserted before the end card of the 1401
emulator CSL deck.
Note:
When a blank is specified key 40:
0048-0000 0050
004C-OOOO 0000
0050-0100 0068
2000 0050
0058-9D00 OOOD
005C-4770 0058
0 060-9C 00 OOOD
0064-47FO 0064
0068-7 040*
006A-2 0
006B-1E
00
6C-XXXX
XXXX
etc ..
CAW
Zeros to align boundary
ccw-punch
Test I/O clear status
wait for clear status
Start I/O punch
wait
*9040 to be used on 24K
systems
20- Enter auxiliary
storage
Nurrber of halfwords to be
entered
Enter 120 hex characters
2.7 1403 BUFFER LOAD MICROLOOP
This routine repetitively loads one buffer
position
~ith
data.
1.
Manually set I/C to the desired buffer
address.
2.
:rtanually set Tl to the desired data
character.
Hex Address
Hex Word
Statement
0280
2484
Set Mede K=8
0282
4F8F
PR=10
0284
2004
0286
0000
0288
4BBF
028A
8280
Set PRA K=20
No-Op
PRO=Tl
Br to 0280
2.8 SOFT-STOP lOOP--SINGLE CYCLING
At present, the Model 25 does not allow an
operator to single cycle through the
sc~-stcp
loop.
This happens because the
start key resets the sof t-stcf latch and
the micrclcop exits to I- cycle.
This is
corrected by blocking the reset cf the
sc~-stop
latch
ty
the start switch with
the diagnostic stop switch.
The procedure to allow single cycle and
stay in the loop is to place the diagnostic
switch in the stop position.
Nothing can
be wired to ' condition in• on the CE panel
at this time.
Exits such as integrated
requests., instruction step frintcut, etc.,
will be capatle of taking the microprogram
out of the soft-stop loop.
If an I-cycle
exit is desired, the operator rrust place
the diagnostic switch tack to process
position.
2.9 STORAGE SCAN
An
operator may be confused when scanning
auxiliary storage if the diagnostic switch
is in scan, load storage, or test pattern
position.
The storage unit ignores the
second hex digit of the auxiliary storage
address when auxiliary stcrage is addressed
(OXOO).
In scan mode, advance the storage
address by +2 each eye le.
As
a result,
addresses 0000, 0100 ••• 0FOO access the same
auxiliary storage location 0000.
If one
syncs on ADDR match or dces an AS ADDR stop
on any auxiliary storage address, the
machine will stop sixteen times because it
access es each location sixteen times.
2.10 WORST- CASE STORAGE SCAN DEFINITION
The purpose of the test pattern switch is
to scan memory and exercise it with a
worst-case pattern.
The pattern can be one
of the following combinations and must be
dialed in switches ABCD:
FFOO, OOFF, 01FE,
FE01.
During the first scan, switch CD is
stored in the first four-bytes of storage.
AB in the next four bytes, and the pattern
switches repetitively in this manner.
This
same pattern flips every 256 addresses
C
if
ADDR 0000 has a FFFF stored in it, hex
address 0100 will have 0000).
Each address of storage is accessed four
times before a +2 address update occurs.
During the first access, the contents of
that location are read out.
The second
access stores the ccmplerrent of that
location in place of the original data.
Then, this corr.plerrent data is read out, and
finally, its complement (the original data)
is stored back.
For Example:
1st Cycle
2nd cycle
3rd Cycle
4th Cycle
ADDR 0000
Read Out FEFE
store
0101
Read Out 0101
Store
FEFE
This process ccntinues f cr each address
of main storage, auxiliary storage, and
control storage.
Only the protected area
of control storage remains unchanged.
2.11 MS ADDRESS STOP PROCEDURE DURING IPL
OR CSL
A condition exists when trying to
MS-address stop during IPL and CSi because
both the device address and the SAR stop
address cannot be in switches ABCD.
To
bypass this condition, the following
procedure should be followed.
2025 FEMM (7/69)
2-3
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