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are fq ur complete circuits per module
including load resistors.
Bit Drivers:
A
one and a zero driver is
required for each bit.
The bit-1 driver is
identical to the X-driver.
The bit-0
driver is slightly different in that an
input diode is used to clamp the output
down level to a higher voltage.
The
bit-one driver is used as an inverter for
the data input to the zero driver.
Sense Amplifier:
The first stage of the
sense amplifier is a gated differential
amplifier followed by a level translating
PNP stage and a saturating inverter.
There
are four bit dr'ivers and two sense
amplifiers on a stacked module.
Voltage Regulator:
Plus-two volts is
defined
by
a shunt regulator consisting of
a differential amplifier and an emitter
follower that drives the common emitter
output transistor.
The larger versions
have two emitter followers.
The reference
voltage is generated by a resistor divider.
Cel1 and Drive Circuit:
See Figure A-4 for
a representation of the drive circuits with
a cell.
A. 1. 5 PIN ASSIGNMENTS
Card (?in assignments for the communicating
lines and power connections to and from the
storage card are as follows.
A-4
(7/69)
Y-Inputs
0 D02
1 B03
2
B04
3
D04
4
BOS
S DOS
6
D06
7 B07
In
DlO
D07
D13
Dll
G03
G02
JOS
GOS
G08
J07
Data
-1-
2
3
4
5
6
7
8
9
10
Bit T. P.
D09
S. A. GATE
B09
+2.0 Test Pin B02
+3.2 Test Pin B13
X-Inputs
0 J09
1
G10
2
J10
3 Jll
4
G12
s
J12
6
G13
7 J13
Out
BlO
B08
B12
D12
G04
J02
G07
J04
G09
J06
+6
B11,G11
GND
008 ,J08
Not Used D03,J03,B06,G06
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