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stora9e Protect O (STPO)
MOM 4- 90
0010
0
STPO bit 0 (HQO)
1
STPO bit
1
(HQl)
2
STPO bit 2 (HQ2)
3
STPO bit
3 (HQ3)
-4
STPO bit 4 (Q4)
5
STPO bit 5 (QS)
6
STPO bit 6 (Q6)
7
STPO bit 7
(Q7)
Stora9e 1 (STP1)
MOM 4-41
0011
0
ST.Pl hit 0
1
STPl hit 1
2
STP1 bit 2
3
STP1 hit 3
4
STP1 bit 4
5
STP1 bit 5
6
STP1 bit
6
7
ST Pl bit 7
Dynamic Condition Register (DYN)
MDM 4-40
0100* 0
1
2
3
4
5
6
7
Z=O
Storage wrap latch
CVF1 (overflow>
Adder carry
Not bold in (Dir Ctl Feat)
Check disable switch
DYN reg bit 6 (HZ=O)
DYN Reg tit 7 ( LZ=O)
Status Register (S)
MDM 4-16
0101* 0
1
2
3
4
5
6
7
SO True/comp! latch
Sl Z=nonzero (a 11 ari
th
ci;:s>
S2 Z=nonz era (log., dee,
&
bin ops>
S3 ALU 0-bit carry
S4 Invalid decimal digit
SS (general purpose)
S6 Not execute
S7 Not exceptional ccnditicn
MMSK Register, Bits 0-7 (MMSK)
MOM
4-15
0110• 0
1
2
3
4
5
6
7
~MSKO
Channel high traF
MMSK1 2311 disk control trap
~MSK2
Channel low traF
MMSK3 2540 reader trap
~MSK4
2540 punch trap
~MSKS
Comm chnl bit serv
MMSK6 Comm chnl char serv
MMSK7 level 1 priority hold
1-56 ( 7/69)
Branch Conditions (BA)
MDM 4-40
0111* 0
Chnl 0 interruption latch
1
Mode bit 0
2
Mode hit 1
3
Mode bit 2
4
IPL latch
5
LS zone bit 0
6
LS zone bit 1
7
LS zone bit 2
1000
Unassigned
1001
Unassigned
Data In (DAIN)
MOM 4-47
1010
0
Sync data in bit 0
1
Sync data in bit 1
2
Sync data in bit 2
3
Sync data in bit 3
4
Sync data in bit 4
5
Sync data in bit
5
6
Sync data in bit
6
7
Sync data in bit 7
Line Address In CLAIN)
MDM 4-47
1011
0
Comm line address in bit 0
1
Comm line address in bit 1
2
Comm line address in bit
2
3
Comm line address in bit
3
4
Comm line address in bit 4
5
0
6
0
7
0
Line Adapter Conditions (LACON)
mM 4-47
1100* 0
1
2
3
4
5
6
7
Sync
IA Enable lat ch
Sync Clock Ind.
Even/odd parity
Leased/switched
Interface A/B
Test Mode latch
Transmit latch
Req to send lat
Start/Stop
LA Enable latch
Even/ odd parity
L'S'D/SW'D NETWORK
Bit overflow
Recv bit buffer
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