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Storage Protect 1, Manual Only (STP1)
MDM 4-41
0011
0
1
2
3
4
5
6
7
STPl tit 0
STP1 bit 1
STP1 tit 2
STPl bit 3
STPl tit 4
STPl bit 5
STPl bit 6
STPl tit 7
Dynand.. c Ccndition :Register C DYN)
MDM 4-40
Z=O
(DC Bit 0)
Storage wrap latch
OVFL (overflow)
CDC Bit 2)
Adder carry
(DC Bit 3)
Not hold in CDir Ctl feat)
Check disable switch
0100
*
0
1
2
3
4
5
6
7
DYN Reg bit 6 (HZ=O)
(DC Bit
6)
DYN Reg bit 7 (LZ=O} (DC Bit 7)
status Register Cs>
MDM
4-16
0101* 0
so True/Compl latch
1
Sl Z=nonzero Call arith ops)
2
S2 Z=nonzero (log, dee.
&
binary
ops)
3
S3 ALU 0- l:it carry
4
S4 Invalid decimal digit
5
S5 (general purpose)
6
S6 Not execute
(MDM 4-40)
7
S7 Not except ion al condition
4-40)
MMSK Register, Bits 0-7 (MMSK)
MDM
4-15
0110* 0
1
2
3
4
5
6
7
MMSKO Channel high trai:
MMSK1 2311 disk control trap
MMSK2 Channel low traF
M~SK3
2540 reader tra{:
MMSK4 2540 punch trap
MMSK5 Comm chnl bit service
MMSK6 Comm chl char service
MMSK7 1evel 1 priority held
Branch Conditicns (BA)
~DM
4-40
0111*
0
Chnl 0 interruption latch
1
Mode bit 0
2
Mode tit
1
3
Mode bit 2
4
IPL latch
5
LS zone bit
0
6
IS zcne tit 1
7
LS zone bit 2
CMDM
Direct Control In
(JI)
**
~M
4-41
1000
0
Dir In bit 0
1
Dir In bit 1
2
Dir In bit 2
3
Dir In bit 3
4
Dir In bit 4
5
Dir In bit 5
6
Dir In bit 6
7
Dir In bit 7
External Interruption (XINT) or Dir ctl **
MDM 4-41
1001
0
1
2
3
4
5
6
7
Timer interruption <Int Timer
feature}
console interruption
Ext Int or Dir Ctl sig-in, bit
Ext Int or Dir Ctl sig- in, bit
Ext Int or Dir Ctl sig-in., bit
Ext Int or Dir Ctl s ig-in, bit
Ext Int or Dir Ctl sig-in, bit
Ext Int or Dir Ctl sig-in, bit
Timer Count (TIM)
**
MOM 4-41
1010
0
0
1
0
2
0
3
0
4
Timer count bit
4
5
Timer count bit 5
6
Timer count bit 6
7
Timer count bit 7
1011
Unassigned
Diagnostic Register (DR)
MDM 4-13
1100* 0
1
2
3
Disable stop on error
Force all A-Reg ALU entries on
Force stor-data parity bits on
Block actual, gen.
pseudo I/O
trap requests
0
2
3
4
5
6
7
4
5
6
7
Force external entry to A/B-Regs
PSW Restart Latch
Turn on diag-branch latch
1011* Unassigned
Error Register (MC}
MDM 4-10
1110* 0
2
3
4
5
6
7
File
cont~ol
check
Storage address check
Control word parity latch
Storage data parity latch
ALU error lat ch
A-Reg parity latch
B-Reg parity latch
2025 FEMM ( 7/69)
1-45
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