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0-
o-
0-
L.S.
Pl
Access
L.S. P3
Access
100 ns/Div.
2V/cm
Setting 1
into A-Reg Bit 0
at Pl
Setting 0
into B-Reg Bit 0
at P3
-L.S. Read Line (A-B 1 E5B09)
1-L.S. Pl Access
0-L. S. P3 Access
Figure 1-138. AB-Assembly Data From Local storage
1st Cycle
2nd Cycle
Pl
STH U U+2 [7018]
U Reg= 0000
-
L.S. Read Line (A-BlE5B09)
Write
Line
Reflection
.!::ll"--t'"7"~..-....&..\::_,.L-t.,._..-1===,,,_-"W''--I.,._~~-'
-
L. S. Bus Bit 0 (A-B 1 E7B02)
(Data Al I 0' s)
200 us/Div
Figure 1-139. Storage Word CWT-2}
1-138
(7/69)
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