Sony TRIMASTER EL BVM-E171 Service Manual page 98

• When OUT_24V and DC_24V are input simultaneously: The FET switch is deactivated. (AC power input takes
precedence.)
The following figures show the above sequence.
When only OUT_24 V is input.
FET
DC_24V switch
circuit
OUT_24V
When OUT_24V and DC_24V are input simultaneously.
FET
switch
DC_24V
circuit
OUT_24V
DC input block and UVP/OVP circuit
The DC input block contains an undervoltage protection circuit (UVP) and an overvoltage protection circuit (OVP).
The following shows setting values of these protection circuits.
• UVP: The protection circuit operates at a voltage of 16 V or lower. (This circuit is reset at a voltage of 16.2 V or
higher.)
• OVP: The protection circuit operates at a voltage of 30.6 V or higher. (This circuit is reset at a voltage of 30.5 V
or lower.)
The following component composes the UVP and OVP circuits.
• Comparator IC (IC3001)
When the UVP or OVP circuit operates, it deactivates the FET switch switching circuit to stop supply of DC_24V to
each circuit of the G board.
Protection circuit sequence diagram
DC_24V
UVP circuit
Monitors voltage
BVM-E171
OFF
OUT_24V is used as a
power voltage of the
DC/DC block.
OFF
OUT_24V is preferentially
is used as a power voltage
of the DC/DC block.
FET
Stop power supply
switch
of DC_24V
circuit
When the protection circuit
operates, the FET switch
circuit is deactivated.
When only DC_24 V is input.
FET
DC_24V switch
circuit
OUT_24V
ON
Suppose DC_24V is
OUT_24V and it is used
as a power voltage of
the DC/DC block.
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