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Chapter 5. HDSL Network Interface
5-30
In addition to the specified self-tests, background tests are
run on various parts of the internal electronics. These run
during normal operation to confirm continued correct
functioning.
This menu selection is used to execute a full internal self-test.
The results of the self-tests are displayed on the Terminal
screen. When you invoke the command, the TEST LEDs are
illuminated. Test failures are displayed on the Terminal
screen. The self-test consists of the following tests:
Board level tests
Each of the TSU 610 boards contain an on-board processor
which executes a series of tests checking the circuitry on the
board.
•
RAM tests; EPROM checksum
•
DS0 map tests
•
On-board data path; sending a known test pattern
through an on- board loop
Unit level tests
•
Front panel LED verification
•
Phase Lock Loop verify
•
Board-to-board interface test
A test pattern is sent from the controller through a loopback
on all other boards and is checked on the controller. This
verifies the data path, clocks, and control signals.
If a failure is detected, note the failure number and contact
ADTRAN Technical Support.
The execution of self-test will disrupt normal data flow and
prevent remote communication until the self-test is
completed.
TSU 610 User Manual
61200610L2-1
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