Output Signal Allocation - YASKAWA Σ-V Series User Manual

3.3.2 Output Signal Allocation

Output signals are allocated as shown in the following table.
Refer to the Interpreting the Output Signal Allocation Tables and change the allocations accordingly.
<Interpreting the Output Signal Allocation Tables>
Output Signal Names
and Parameters
Positioning Completion
Pn50E.0
Output Signal Names
and Parameters
Positioning Completion
Pn50E.0
Speed Coincidence
Detection
Pn50E.1
Movement Detection
Pn50E.2
Servo Ready
Pn50E.3
Force Limit Detection
Pn50F.0
Speed Limit Detection
Pn50F.1
Brake
Pn50F.2
Warning
Pn50F.3
Near
Pn510.0
Output signal polarity
inversion
Pn512.0=1
Output signal polarity
inversion
Pn512.1=1
Output signal polarity
inversion
Pn512.2=1
Output Signal
1/(2)
/COIN 1
Output Signal
1/ (2)
/COIN 1
/V-CMP 1
/TGON 1
/S-RDY 1
/CLT 1
/VLT 1
/BK 1
/WARN 1
/NEAR 1
Polarity inversion of CN1-1(2)
Polarity inversion of CN1-23(24)
Polarity inversion of CN1-25(26)
• The signals not detected are considered as "Invalid."
• Inverting the polarity of the brake signal (/BK), i.e. positive logic, will prevent the hold-
ing brake from working in case of its signal line disconnection.
If this setting is absolutely necessary, check the operation and confirm that there are
no safety problems.
• If two or more signals are allocated to the same output circuit, a signal is output with
OR logic circuit.
The parameter set values to be used are shown.
Signals are allocated to CN1 pins according to the
selected set values.
Values in cells in bold lines are the factory settings.
CN1 Pin Numbers
23/(24) 25/(26)
2 3
CN1 Pin Numbers
23/ (24) 25/ (26)
2
2
2
2
2
2
2
2
2
3.3 I/O Signal Allocations
Invalid
(not use)
0
Invalid
(not use)
3 0
3 0
3 0
3 0
3 0
3 0
3 0
3 0
3 0
0
(Not invert at
factory setting)
3-23
3