Buffered (Sample Clock) Edge Counting; Controlling The Direction Of Counting - National Instruments DAQ X Series User Manual

Buffered (Sample Clock) Edge Counting

With buffered edge counting (edge counting using a sample clock), the
counter counts the number of edges on the Source input after the counter is
armed. The value of the counter is sampled on each active edge of a sample
clock and stored in the FIFO. A DMA controller transfers the sampled
values to host memory.
The count values returned are the cumulative counts since the counter
armed event. That is, the sample clock does not reset the counter.
You can configure the counter to sample on the rising or falling edge of the
sample clock.
Figure 7-4 shows an example of buffered edge counting. Notice that
counting begins when the counter is armed, which occurs before the
first active edge on Sample Clock.

Controlling the Direction of Counting

In edge counting applications, the counter can count up or down. You can
configure the counter to do the following:
•
•
•
For information about connecting counter signals, refer to the
Counter/Timer Pinouts
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Counter Armed
Sample Clock
(Sample on Rising Edge)
SOURCE
Counter Value 0
Buffer
Figure 7-4. Buffered (Sample Clock) Edge Counting
Always count up
Always count down
Count up when the Counter 0 B input is high; count down when it
is low
section.
7-5
Chapter 7 Counters
1 2 3 4 5 6 7
3 3
6
Default
X Series User Manual