Hardware-Timed Acquisitions - National Instruments DAQ X Series User Manual

Each of the X Series DIO lines can be used as a static DI or DO line. You
can use static DIO lines to monitor or control digital signals. Each DIO can
be individually configured as a digital input (DI) or digital output (DO).
All samples of static DI lines and updates of static DO lines are
software-timed.

Hardware-Timed Acquisitions

With hardware-timed acquisitions, a digital hardware signal
(di/SampleClock) controls the rate of the acquisition. This signal can be
generated internally on your device or provided externally.
Hardware-timed acquisitions have several advantages over software-timed
acquisitions.
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Hardware-timed operations can be buffered or hardware-timed single
point. A buffer is a temporary storage in computer memory for
to-be-transferred samples.
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The time between samples can be much shorter.
The timing between samples is deterministic.
Hardware-timed acquisitions can use hardware triggering.
Buffered—Data is moved from the DAQ device's onboard FIFO
memory to a PC buffer using DMA before it is transferred to
application memory. Buffered acquisitions typically allow for much
faster transfer rates than non-buffered acquisitions because data is
moved in large blocks, rather than one point at a time.
One property of buffered I/O operations is the sample mode. The
sample mode can be either finite or continuous:
– Finite sample mode acquisition refers to the acquisition of a
specific, predetermined number of data samples. Once the
specified number of samples has been read in, the acquisition
stops. If you use a reference trigger, you must use finite sample
mode.
– Continuous acquisition refers to the acquisition of an unspecified
number of samples. Instead of acquiring a set number of data
samples and stopping, a continuous acquisition continues until
you stop the operation. Continuous acquisition is also referred to
as double-buffered or circular-buffered acquisition.
If data cannot be transferred across the bus fast enough, the FIFO
becomes full. New acquisitions will overwrite data in the FIFO
before it can be transferred to host memory. The device generates
6-3
Chapter 6 Digital I/O
X Series User Manual