Digital Waveform Acquisition - National Instruments DAQ X Series User Manual

Digital Waveform Acquisition

Figure 6-2 summarizes all of the timing options provided by the digital
input timing engine.
100 MHz Timebase
DSTAR <A..B>
Revamp AO timing options with DI timebase and clocks
PFI, RTSI
PXI_STAR
Analog Comparison
Event
20 MHz Timebase
100 kHz Timebase
PXI_CLK10
You can acquire digital waveforms on the Port 0 DIO lines. The DI
waveform acquisition FIFO stores the digital samples. X Series devices
have a DMA controller dedicated to moving data from the DI waveform
acquisition FIFO to system memory. The DAQ device samples the DIO
lines on each rising or falling edge of a clock signal, DI Sample Clock.
You can configure each DIO line to be an output, a static input, or a digital
waveform acquisition input.
X Series devices feature the following digital input timing signals:
•
•
•
•
•
Signals with an
of Chapter 8, PFI, for more information.
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DSTAR <A..B>
Analog Comparison Event
Ctr n Internal Output
DI Sample Clock
Timebase Programmable
Clock
Divider
Figure 6-2. Digital Input Timing Options
*
DI Sample Clock Signal
DI Sample Clock Timebase Signal
*
DI Start Trigger Signal
DI Reference Trigger Signal
*
DI Pause Trigger Signal
*
support digital filtering. Refer to the
6-5
Chapter 6
PFI, RTSI
PXI_STAR
DI Sample Clock
*
PFI Filters
X Series User Manual
Digital I/O
section