Programmable Range N Start Address Registers (Progn_Mpsar) - Texas Instruments AM1802 Reference Manual

Arm microprocessor system
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MPU Registers

5.3.10 Programmable Range n Start Address Registers (PROGn_MPSAR)

NOTE: In some cases the amount of physical memory in actual use may be less than the maximum
amount of memory supported by the device. For example, the device may support a total of
512 Mbytes of SDRAM memory, but your design may only populate 128 Mbytes. In such
cases, the unpopulated memory range must be protected in order to prevent
unintended/disallowed aliased access to protected memory, especially memory. One of the
programmable address ranges could be used to detect accesses to this unpopulated
memory.
The programmable range n start address register (PROGn_MPSAR) holds the start address for the range
n. The PROGn_MPSAR is writeable by a supervisor entity only.
The start address must be aligned on a page boundary. The size of the page depends on the MPU: the
page size for MPU1 is 1 KBbyte; the page size for MPU2 is 64 KBytes. The size of the page determines
the width of the address field in PROGn_MPSAR and the programmable range n end address register
(PROGn_MPEAR). For example, to protect a 64-KB page starting at byte address 8001 0000h, write
8001 0000h to PROGn_MPSAR and 8001 FFFFh to PROGn_MPEAR.
5.3.10.1 MPU1 Programmable Range n Start Address Register (PROG1_MPSAR-PROG6_MPSAR)
The PROGn_MPSAR for MPU1 is shown in
Figure 5-12. MPU1 Programmable Range n Start Address Register (PROGn_MPSAR)
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-15. MPU1 Programmable Range n Start Address Register (PROGn_MPSAR)
Bit
Field
31-10
START_ADDR
9-0
Reserved
5.3.10.2 MPU2 Programmable Range n Start Address Register (PROG1_MPSAR-PROG12_MPSAR)
The PROGn_MPSAR for MPU2 is shown in
Figure 5-13. MPU2 Programmable Range n Start Address Register (PROGn_MPSAR)
31
START_ADDR
R/W-C000h
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-16. MPU2 Programmable Range n Start Address Register (PROGn_MPSAR)
Bit
Field
31-16
START_ADDR
C000h–DFFFh
15-0
Reserved
52
Memory Protection Unit (MPU)
START_ADDR
R/W-20 0000h
Field Descriptions
Value
Description
20 0000h–
Start address for range N .
20 007Fh
0
Reserved
Field Descriptions
Value
Description
Start address for range N.
0
Reserved
Copyright © 2011, Texas Instruments Incorporated
Figure 5-12
and described in
10
Figure 5-13
and described in
16 15
www.ti.com
Table
5-15.
9
Reserved
R-0
Table
5-16.
Reserved
R-0
SPRUGX5A – May 2011
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