Pin Multiplexing Control Registers (Pinmux0-Pinmux19); Pin Multiplexing Control 0 Register (Pinmux0); Pin Multiplexing Control 0 Register (Pinmux0) Field Descriptions - Texas Instruments AM1802 Reference Manual

SYSCFG Registers

10.4.9 Pin Multiplexing Control Registers (PINMUX0-PINMUX19)

Extensive use of pin multiplexing is used to accommodate the large number of peripheral functions in the
smallest possible package. On the device, pin multiplexing can be controlled on a pin by pin basis. This is
done by the pin multiplexing registers (PINMUX0-PINMUX19). Each pin that is multiplexed with several
different functions has a corresponding 4-bit field in PINMUXn. Pin multiplexing selects which of several
peripheral pin functions control the pins I/O buffer output data and output enable values only. Note that the
input from each pin is always routed to all of the peripherals that share the pin; the PINMUX registers
have no effect on input from a pin. Hardware does not attempt to ensure that the proper pin multiplexing is
selected for the peripherals or that interface mode is being used. Detailed information about the pin
multiplexing and control is covered in the device-specific data manual. Access to the pin multiplexing utility
is available in AM18xx Pin Multiplexing Utility Application Report (SPRABA2).

10.4.9.1 Pin Multiplexing Control 0 Register (PINMUX0)

31 28
PINMUX0_31_28
R/W-0
15 12
PINMUX0_15_12
R/W-0
LEGEND: R/W = Read/Write; -n = value after reset
Table 10-21. Pin Multiplexing Control 0 Register (PINMUX0) Field Descriptions
Bit Field
31-28 PINMUX0_31_28
27-24 PINMUX0_27_24
(1)
I = Input, O = Output, I/O = Bidirectional, X = Undefined, Z = High-impedance state
162
System Configuration (SYSCFG) Module
Figure 10-17. Pin Multiplexing Control 0 Register (PINMUX0)
27 24
PINMUX0_27_24
R/W-0
11 8
PINMUX0_11_8
R/W-0
Value Description
RTC_ALARM/UART2_CTS/GP0[8]/DEEPSLEEP Control
0 Selects Function DEEPSLEEP
1h Reserved
2h Selects Function RTC_ALARM
3h Reserved
4h Selects Function UART2_CTS
5h-7h Reserved
8h Selects Function GP0[8]
9h-Fh Reserved
AMUTE/UART2_RTS/GP0[9] Control
0 Pin is 3-stated.
1h Selects Function AMUTE
2h-3h Reserved
4h Selects Function UART2_RTS
5h-7h Reserved
8h Selects Function GP0[9]
9h-Fh Reserved
Copyright © 2011, Texas Instruments Incorporated
23 20
PINMUX0_23_20
R/W-0
7 4
PINMUX0_7_4
R/W-0
www.ti.com
19 16
PINMUX0_19_16
R/W-0
3 0
PINMUX0_3_0
R/W-0
(1)
Type
I
X
O
X
I
X
I/O
X
Z
I/O
X
O
X
I/O
X
SPRUGX5A – May 2011
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