Pllc0 Reset Control Register (Rsctrl); Reset Control Register (Rsctrl); Reset Control Register (Rsctrl) Field Descriptions - Texas Instruments AM1802 Reference Manual

Arm microprocessor system
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PLLC Registers

7.3.4 PLLC0 Reset Control Register (RSCTRL)

The reset control register (RSCTRL) allows the device to perform a software-initiated reset. Before writing
to the SWRST bit, the register must be unlocked by writing the key value of 5A69h to the KEY bit field.
The KEY bit field reads back as Ch when the register is unlocked; any other key value is invalid and
indicates that the register is locked. Any write to the register following a successful unlock relocks the
register. RSCTRL is shown in
31
15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit
Field
Value
31-17
Reserved
16
SWRST
15-0
KEY
0-FFFFh
5A69h
80
Phase-Locked Loop Controller (PLLC)
Figure 7-5
and described in
Figure 7-5. Reset Control Register (RSCTRL)
Reserved
R-0
Table 7-7. Reset Control Register (RSCTRL) Field Descriptions
Description
0
Reserved
PLL software reset. Register must be unlocked before writing to this bit. Writes are possible only
when qualified with a valid key.
0
In software reset
1
Not in software reset
RSCTRL unlock key. Key used to enable writes to RSCTRL.
3h
Register is locked when read value is 3h.
Ch
Register is unlocked when read value is Ch.
RSCTRL unlock key
Copyright © 2011, Texas Instruments Incorporated
Table
7-7.
KEY
R/W-3h
www.ti.com
17
16
SWRST
R/W-1
0
SPRUGX5A – May 2011
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