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This user's guide describes the characteristics, operation, and use of the
ADS8364/65MEVM 16-bit, parallel analog-to-digital converter evaluation module
(EVM). A complete circuit description, a schematic diagram, and bill of materials is
included.
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EVM Overview
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Features
Full-featured evaluation board for the ADS8364 and ADS8365 250-kHz, 16-bit, 6-channel,
simultaneous-sampling, analog-to-digital converter
Analog inputs can be configured as single-ended or differential
Modular design allows direct connection to various DSP platforms through the 5-6K and HPA-MCU
Interface Boards
Built-in reference
High-speed parallel interface
SLAU189 - September 2006
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ADS8364/65MEVM
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User's Guide
SLAU189 - September 2006
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ADS8364/65MEVM
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Table of Contents
Related Manuals for Texas Instruments ADS8365MEVM
Summary of Contents for Texas Instruments ADS8365MEVM
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Page 1: Table Of Contents
Digital Interface ..................Power Supplies ..................EVM Operation ........EVM Bill of Materials, Assembly Drawing, and Schematic ..........Related Documentation From Texas Instruments List of Figures ................Channel A0 Input Circuit ................Channel A1 Input Circuit ............ADS8364/654MEVM Assembly Drawing List of Tables ............ -
Page 2: Introduction
www.ti.com Introduction Introduction The ADS8364 and ADS8365 are high-speed, low-power, 6-channel, 16-bit A/D converters that operate from independent +5-V Avdd and Dvdd supplies. Internal buffer circuits powered from 3.3-V to 5.5-V BVdd supplies allow for mixed logic level operation without additional level translation. The six input channels contain fully differential sample-and-hold circuits which are divided into three pairs (A, B, and C). -
Page 3: Channel A0 Input Circuit
www.ti.com Analog Interface NOTE: Components marked NI are NOT INSTALLED. Figure 1. Channel A0 Input Circuit This configuration allows single-ended signals of 2.5 V (+5 Vpp) to be applied to either input of channel A0 (J2 pin 1 or 3 referenced to pin 2). The input also can be applied to connector J4 (not shown) pins 2 or 4, referenced to analog ground. -
Page 4: Digital Interface
www.ti.com Digital Interface The output from the buffer stage in each case applies 0-5 V to the CHA0(+) input when the applied signal is connected to J2 pin 1 or J4 pin 2. The applied signal is directed to the CHA0(-) input when connected via J2 pin 3 or J4 pin 4. -
Page 5: Header/Socket Combinations At J5
www.ti.com Digital Interface Jumpers W4 and W6 control the signals applied to A0, A1, A2, and CS. In the factory default mode, W6 is closed by means of a shunt jumper. The Ax and CS pins are controlled by the signals applied to J5 (top or bottom side). -
Page 6: Power Supplies
www.ti.com Power Supplies Table 3. J1 Pinout and Functions Pin Number Signal Description J1.1 Controls power-down options on the ADS8365 (only) using the NAP input pin J1.3 Controls read options, when HI, address information can be read from the chip J1.5 HOLD_C# Active-low signal HOLDC used to start a conversion on ADC channel pair C... -
Page 7: Evm Bill Of Materials, Assembly Drawing, And Schematic
www.ti.com EVM Bill of Materials, Assembly Drawing, and Schematic The digital control signals can be applied directly to J1 and J5 (top or bottom side). The ADS8364/65MEVM can also be connected directly to the 5-6K Interface Board for use with a variety of C5000™... - Page 8 5001 TP11 TP13–TP17 SMT Test Point Loop – Shown on Silkscreen as: A0, Keystone 5015 TP21–TP24 A1, A2, RST, RD, WR, CS, CLOCK, FD, EOC OPA2132, SOIC Texas Instruments OPA2132UA OPA2340; DGK package Texas Instruments OPA2340EA ADS8364 Texas Instruments ADS8364Y/250 INA159;...
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Page 9: Ads8364/654Mevm Assembly Drawing
www.ti.com EVM Bill of Materials, Assembly Drawing, and Schematic Assembly Drawing Figure 3 shows the top layer of the ADS8364/65MEVM and provides quick access to component designator found on the PWB. Complete Gerber files are available on request. Figure 3. ADS8364/654MEVM Assembly Drawing Circuit Schematics The entire circuit schematic for the ADS8364/65MEVM appears on the following page. -
Page 10: Related Documentation From Texas Instruments
Revision History ECN Number Approved Note: Components marked "NI" are NOT installed! 33pF 4.99K 4.99K -Vin Op Amp Bypass +Vin A0In 49.9 49.9 49.9 OPA2132 0.01uF 100pF 100pF 100pF +Vin Vref 0.01uF 4.99K -Vin 33pF 4.99K 4.99K 49.9 49.9 49.9 OPA2132 100pF 100pF... - Page 11 ADC Bypass BVdd DVdd AVdd DC_CSa BVdd DC_AWE DC_ARE# AVdd DVdd BVdd 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 11 12 13 14 EVM_A0 15 16 DC_TOUT BGND 17 18 TP13 DC_INTa 19 20 EVM_A1 TP21 Parallel Control TP15 EVM_A2 BVdd TP17...
- Page 12 Related Documentation From Texas Instruments Related Documentation From Texas Instruments 1. ADS8364, 250kHz, 16-Bit, 6-Channel Simultaneous Sampling Analog-to-Digital Converters data sheet (SBAS219) 2. ADS8365, 250kHz, 16-Bit, 6-Channel Simultaneous Sampling Analog-to-Digital Converter data sheet (SBAS362) 3. OPA2132, High-Speed FET-Input Operational Amplifiers data sheet (SBOS054) 4.
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Page 13: Fcc Warning
EVALUATION BOARD/KIT IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards. - Page 14 TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products...