Interrupt Raw Status/Set Register (Irawstat); Interrupt Raw Status/Set Register (Irawstat) Field Descriptions - Texas Instruments AM1802 Reference Manual

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5.3.3 Interrupt Raw Status/Set Register (IRAWSTAT)

Reading the interrupt raw status/set register (IRAWSTAT) returns the status of all interrupts. Software can
write to IRAWSTAT to manually set an interrupt; however, an interrupt is generated only if the interrupt is
enabled in the interrupt enable set register (IENSET). Writes of 0 have no effect. The IRAWSTAT is
shown in Figure 5-5
31
15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-10. Interrupt Raw Status/Set Register (IRAWSTAT) Field Descriptions
Bit Field
31-2 Reserved
1 ADDRERR
0 PROTERR
SPRUGX5A – May 2011
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and described in Table
Figure 5-5. Interrupt Raw Status/Set Register (IRAWSTAT)
R-0
Value Description
0 Reserved
Address violation error. Reading this bit reflects the status of the interrupt. Writing 1 sets the status;
writing 0 has no effect.
0 Interrupt is not set.
1 Interrupt is set.
Protection violation error. Reading this bit reflects the status of the interrupt. Writing 1 sets the
status; writing 0 has no effect.
0 Interrupt is not set.
1 Interrupt is set.
Copyright © 2011, Texas Instruments Incorporated
5-10.
Reserved
R-0
MPU Registers
2 1 0
ADDRERR PROTERR
R/W-0 R/W-0
Memory Protection Unit (MPU)
16
47