Revision 1.0
DMA Addressing Bits
Since all DMA accesses must be 64-bit aligned, the lower three bits of source
and destination addresses are ignored and assumed to be all 0's.
Transfer lengths are encoded as (length - 1), so the lower three bits of the
length are ignored and assumed to be all 1's.
The DMA LENGTH registers can be programmed with a line count and line
stride, to transfer arbitrary rectangular pieces of memory (such as a portion
of an image). See Figure 4-1, "DMA Transfer Length Encoding," on page 84,
for more information.
CPU Semaphore
The CPU-RSP semaphore should be used to share DMA resources. Since the
CPU could possibly DMA data to/from the RSP while the RSP is running,
this semaphore is necessary to share the DMA engine.
The current graphics and audio microcode assume the CPU will
Note:
not be DMA'ing data to/from the RSP while the RSP is running. This
eliminates the need to check the semaphore (on the RSP side), saving a
few instructions.
DMA Examples
The following examples illustrate programming RSP DMA transactions:
DMA
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