Modified Instructions - Nintendo Ultra64 Programmer's Manual

RSP Architecture
28
•
BEQL, BNEL, BLEZL, BGTZL, BLTZL, BGEZL, BLTZALL,
BGTZALL, BGEZALL, (all "likely" branches)
• MFHI, MTHI, MFLO, MTLO, (all HI/LO register moves)
•
DADDI, DADDIU, DSLLV, DSRLV, DSRAV, DMULT, DMULTU,
DDIV, DDIVU, DADD, DADDU, DSUB, DSUBU, DSLL, DSRL,
DSRA, DSLL32, DSRL32, DSRA32, (all 64-bit instructions)
• MULT, MULTU, DIV, DIVU, (all multiply/divide instructions)
SYSCALL, (RSP does not generate exceptions)
•
SYNC, (this instruction is intended for multiprocessor systems)
•
• BCzF, BCzT (all branch-on-coprocessor instructions)
•
TGE, TGEU, TLT, TLTU, TEQ, TNE, TGEI, TGEIU, TLTI, TLTIU,
TEQI, TNEI, (all TRAP instructions)

Modified Instructions

Some RSP instructions do not behave precisely like their R4000 counterparts.
Some major differences:
• ADD/ADDU, ADDI/ADDIU, SLTI/SLTIU, SUB/SUBU. Each pair of
these is synonymous with each other, since the RSP does not signal
overflow exceptions.
• BREAK does not generate a trap; instead condition bits in the RSP
status register are set and an interrupt is signaled.
Detailed behavior of all instructions is presented in Appendix A , "RSP
Instruction Set Details".