Figure 4-1 Dma Transfer Length Encoding - Nintendo Ultra64 Programmer's Manual

RSP Coprocessor 0
count
84
The three fields of this register are used to encode arbitrary transfers of
rectangular areas of DRAM to/from contiguous I/DMEM.
number of bytes per line to transfer,
the line stride, or skip value between lines. This is illustrated in Figure 4-1:
Figure 4-1
length
skip
DRAM
DMA
Note:
count of 0 means 1 line, a byte
A straightforward linear transfer will have a count of 0 and skip of 0,
transferring (length+1) bytes.
The amount of data transferred must be a multiple of 8 bytes (64 bits), hence
the lower three bits of
DMA transfer begins when the length register is written.
For more information about DMA transfers, see section "DMA" on page 96.
On power-up, these registers are 0x0.
DMA Transfer Length Encoding
length = 7
skip = 8
count = 10
length count
and line are encoded as (value - 1), that is a line
length
length are ignored and assumed to be all 1's.
count is the number of lines, and
DMEM
of 7 means 8 bytes, etc.
length
is the
skip is