Vector Multiply Examples; Figure 3-10 Double-Precision Vu Multiply - Nintendo Ultra64 Programmer's Manual

Vector Unit Instructions
64
Double precision operands use a register pair, one register containing the
upper signed 16 bits and another containing the low unsigned 16 bits.
Double precision multiplication is illustrated in Figure 3-10.

Figure 3-10 Double-precision VU Multiply

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Accumulator
Since double precision returns at most a 32 bit result, software must keep
numbers in range.
Mixed precision, that is a 16x32 multiply, can be performed with different
combinations of multiply instructions.
In some instances, it is necessary to use an additional multiply instruction to
extract the rest of the answer from the accumulator. This is necessary
because one of the partial-product multiplies may change the sign of the
result, requiring you to retrieve a portion of the result from the accumulator
again.
VS and VT operands
High 16b signed int,
Low 16b unsigned frac
vmudl SL * TL >> 16
vmadm SH * TL >> 0
vmadn SL * TH >> 0
vmadh SH * TH << 16
VD result
H 16b int, L 16b fract