Vector Unit Instructions
68
Type
Instruction
1 1 0 1
vsar
1 1 1 0
reserved
1 1 1 1
reserved
The VU adds are short (16 bit) add operations; they clear VCO and clamp to
16 bit signed values. vadd uses VCO as carry in, vsub uses VCO as borrow in,
and vabs ignores VCO:
vadd:
vsub:
vabs: conditional negation of
if (VS < 0)
VD = -VT;
else if (VS == 0)
VD = VS;
else
VD = VT;
Add operations for double precision, no clamping:
vaddc:
vsubc:
vsar: read the accumulator and write to
the contents of
vs
.
vt
is ignored. The high, middle, or low 16 bits of the
accumulator are selected by the e
0, 1, and 2, respectively). No clamping is performed. vsar is useful for
diagnostics and extended precision.
Vector Add Examples
The following code fragments illustrate various adds. In this section, the
following notation is used:
VD = VS + VT
VD = VS - VT.
vt
vs
by the sign of
. Also performs sign().
VD = VS + VT, set VCO with carry out and not
equal.
VD = VS - VT, set VCO with borrow out and not
equal.
vd
, and write the accumulator with
lement
(corresponding to element values of