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Vector Unit Instructions
52

Packed

Packed loads and stores move memory bytes to or from short elements of the
VU register, which are aligned to shorts. They are useful for accessing one,
two, or four channel byte image data for VU processing as shorts, such as for
VU multiplies.
When only some bits of a slice receive data from memory the remaining bits
in the slice get zeros.
lpv/spv (pack) moves 8 consecutive bytes to or from a memory.
luv/suv (unsigned pack) is similar to lpv/spv, except the memory byte
MSB is aligned to bit 14 of the VU short for unsigned data.
lhv/shv (half) moves every other memory byte, and the selection of odd or
even bytes is controlled by the memory byte address.
lfv/sfv (fourth) moves every fourth memory byte, and the selection of
which bytes is controlled by the memory byte address. Since fourth only
access four bytes within a memory word,
or high four shorts of the VU register are accessed.
Packed loads and stores are illustrated in Figure 3-3.
element
specifies whether the low

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