Table 4-6 Rsp Coprocessor 0 Registers (Cpu View) - Nintendo Ultra64 Programmer's Manual

RSP Coprocessor 0
Register
Number
$c0
$c1
$c2
$c3
$c4
$c5
$c6
$c7
$c8
$c9
$c10
$c11
$c12
$c13
$c14
$c15
94
Bit patterns for READ and WRITE access are the same as described in the
previous section.

Table 4-6 RSP Coprocessor 0 Registers (CPU VIEW)

Access
Address
0x04040000
0x04040004
0x04040008
0x0404000c
0x04040010
0x04040014
0x04040018
0x0404001c
0x04100000
0x04100004
0x04100008
0x0410000c
0x04100010
0x04100014
0x04100018
0x0410001c
Mode
RW I/DMEM address for DMA.
RW DRAM address for DMA.
RW DMA READ length (DRAM
RW DMA WRITE length (DRAM
RW RSP Status.
R DMA full.
R DMA busy.
RW CPU-RSP Semaphore.
RW RDP command buffer START.
RW RDP command buffer END.
R RDP command buffer CURRENT.
RW RDP Status.
R RDP clock counter.
R RDP command buffer BUSY.
R RDP pipe BUSY.
R RDP TMEM BUSY.
Description

I/DMEM).

I/DMEM).