Table 4-2 Rsp Status Register - Nintendo Ultra64 Programmer's Manual

$c4
This register holds the RSP status.
14
s7
1

Table 4-2 RSP Status Register

Access
bit field
Mode
0 h RW
1 b R
2 db R
3 df R
4 if R
5 ss RW
6 ib RW
7 s0 RW
8 s1 RW
9 s2 RW
10 s3 RW
11 s4 RW
12 s5 RW
13 s6 RW
14 s7 RW
Revision 1.0
13 12 11 10 9 8
s6 s5 s4 s3 s2 s1
1 1 1 1 1 1
Description
RSP is halted.
RSP has encountered a break instruction.
DMA is busy.
DMA is full.
IO is full.
RSP is in single-step mode.
Interrupt on break.
signal 0 is set.
signal 1 is set.
signal 2 is set.
signal 3 is set.
signal 4 is set.
signal 5 is set.
signal 6 is set.
signal 7 is set.
7 6 5 4 3 2
s0 ib ss if df db
1 1 1 1 1 1
Register Descriptions
1 0
b h
1 1
85