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State Mode
When you select State Mode, the State Mode Controls area appears.
167 MHz/333
MHz State
Speed
Configuration
Trigger Position Lets you specify where the sample that triggered the
Acquisition
Depth
Clock Setup
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Lets you configure the state analyzer for faster sampling,
but with clocking restricted to the J clock on Pod 1 of the
master card and triggering restricted to two trigger
functions.
analyzer should appear among all the other samples that
are stored in acquisition memory.
Lets you use a smaller portion of the acquisition memory
and speed up processing of the captured data.
Lets you specify: the clock mode, the clock signal edges
from the device under test that will be used as the sampling
clock, and the clock input signal levels (from the device
Chapter 3: Reference
The Sampling Tab
117
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