Client Interface - Xilinx Virtex-4 User Manual

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Client, Host, and MDIO Interfaces
This chapter provides useful design information for user interaction with the Virtex®-4
FPGA Tri-Mode Ethernet MAC. It contains the following sections:
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Client Interface

The client interface is designed for maximum flexibility for matching the client switching
fabric or network processor interface.
Both the transmit and receive data pathway can be configured to be either 8 bits wide or
16 bits wide, with each pathway synchronous to the CLIENTEMAC#TXCLIENTCLKIN
(transmit) or CLIENTEMAC#RXCLIENTCLKIN (receive) for completely independent
full-duplex operation.
Figure 3-1
PHYEMAC#MIITXCLK functions as CLIENTEMAC#TXCLIENTCLKIN/2.
TIEEMAC#CONFIGVEC[66] selects between an 8-bit or 16-bit client interface.
www.BDTIC.com/XILINX
Embedded Tri-Mode Ethernet MAC User Guide
UG074 (v2.2) February 22, 2010
"Client Interface," page 37
"Host Interface," page 72
"MDIO Interface," page 93
shows a block diagram of the transmit client interface. In 16-bit client mode,
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Chapter 3
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