Ethernet Mac Primitive - Xilinx Virtex-4 User Manual

Fpga embedded tri-mode ethernet mac
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Chapter 2: Ethernet MAC Architecture

Ethernet MAC Primitive

The Virtex-4 FPGA Embedded Tri-Mode Ethernet MAC has an EMAC primitive. The
primitive contains access to both Ethernet MACs (EMAC0 and EMAC1).
By using the Ethernet MAC primitive, any of these supported interfaces can be created:
Detailed connections to support/create these interfaces using the Ethernet MAC primitive
are found in
The Ethernet MAC primitive is discussed in different sections:
The Ethernet MAC primitive can be simplified for specific customer needs using Ethernet
MAC wrappers.
Ethernet MAC wrappers use the CORE Generator™ software to simplify the Ethernet
MAC primitives.
Figure 2-3
(EMAC0 and EMAC1) in the EMAC primitive.
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Gigabit Media Independent Interface (GMII)
Media Independent Interface (MII)
Reduced Gigabit Media Independent Interface (RGMII)
Serial Gigabit Media Independent Interface (SGMII)
1000BASE-X Physical Coding Sublayer (PCS) and Physical Medium Attachment
(PMA)
Chapter 4, "Physical Interface."
Receive / Transmit Client Interface
See
"Client Interface" in Chapter
Flow Control
See
"Flow Control Block" in Chapter
Generic Host Bus
Interface to any host (i.e., PowerPC
and status of both Ethernet MACs. See
DCR Bus
Interface to the PowerPC processor through the DCR bus to access the control and
status of both Ethernet MACs. See
Physical Interface
Physical interface depending on the mode of configuration. See
Interface."
Multi-Gigabit Transceiver
Interface to the RocketIO transceivers when the Ethernet MAC is configured in either
SGMII or 1000BASE-X PCS/PMA mode. See
Independent Interface (SGMII)"
Management Data I/O (MDIO)
Interface to the Management Data I/O of either an external physical interface or the
PCS sublayer when configured in SGMII or 1000BASE-X PCS/PMA mode. See
Interface" in Chapter
3.
Chapter 7, "Using the Embedded Ethernet MAC,"
illustrates the Ethernet MAC primitive. The # sign denotes both Ethernet MACs
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3.
3.
®
or MicroBlaze™ processor) to access the control
"Host Interface" in Chapter
"Using the DCR Bus as the Host Bus" in Chapter
"10/100/1000 Serial Gigabit Media
or
"1000BASE-X PCS/PMA" in Chapter
Embedded Tri-Mode Ethernet MAC User Guide
UG074 (v2.2) February 22, 2010
R
3.
3.
Chapter 4, "Physical
4.
"MDIO
describes how

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