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R
TX Client
CLIENTEMAC#TXGMIIMIICLKIN
Logic
EMAC#CLIENTTXGMIIMIICLKOUT
CLIENTEMAC#TXCLIENTCLKIN
X
EMAC#CLIENTTXCLIENTCLKOUT
GTX_CLK
PHYEMAC#GTXCLK
RX Client
Logic
CLIENTEMAC#RXCLIENTCLKIN
X
EMAC#CLIENTRXCLIENTCLKOUT
CLIENTEMAC#DCMLOCKED
Figure 4-10: Tri-Mode GMII Clock Management with Byte PHY Enabled
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Embedded Tri-Mode Ethernet MAC User Guide
UG074 (v2.2) February 22, 2010
SPEED_IS_10_100
EMAC#
SPEED_IS_10_100
EMAC#PHYTXD[3:0]
EMAC#PHYTXD[7:4]
PHYEMAC#MIITXCLK
PHYEMAC#RXD[3:0]
4-bit to 8-bit
Realignment
PHYEMAC#RXD[7:4]
SPEED_IS_10_100
PHYEMAC#RXCLK
I0
BUFGMUX
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Gigabit Media Independent Interface (GMII) Signals
ODDR
OBUF
0
D1
Q
1
D2
tx_clk_div2
I1
D
Q
IBUFG
I0
BUFGMUX
ODDR
OBUF
Q
D1
I0
D2
I1
ODDR
OBUF
D1
Q
D2
IDDR
Q1
D
Q2
Logic
IDDR
Q1
D
Q2
rx_clk_div2
CLK0
I1
D Q
GMII_TX_CLK_#
MII_TX_CLK_#
GMII_TXD_#[3:0]
GMII_TXD_#[7:4]
IBUF
GMII_RXD_#[3:0]
IBUF
GMII_RXD_#[7:4]
DCM
IBUFG
CLKIN
GMII_RX_CLK_#
CLKFB
UG074_3_77_031009
111
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