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Chapter 2: Ethernet MAC Architecture
Unicast Address
Table 2-12
Ethernet MAC address for the Virtex-4 FPGA Embedded Tri-Mode Ethernet MAC.
Table 2-12: Unicast Address Pins
Signal
TIEEMAC#UNICASTADDR[47:0]
Notes:
1. All of the TIEEMAC#UNICASTADDR[47:0] bits are registered on input and can be treated as asynchronous inputs.
Management Data Input/Output (MDIO) Interface Signals
Table 2-13
MDIO format is defined in IEEE Std 802.3, Clause 22.
Table 2-13: MDIO Interface Signals
Signal
EMAC#PHYMCLKOUT
PHYEMAC#MCLKIN
PHYEMAC#MDIN
EMAC#PHYMDOUT
EMAC#PHYMDTRI
Mode-Dependent Signals
The Ethernet MAC has several signals that change definition depending on the selected
operating mode. This section describes the basic signals in the various operating modes.
Data and Control Signals
Table 2-14
tie-off pins. These signals are multiplexed, and their functionality is defined when the
mode is set.
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describes the 48 tie-off pins (TIEEMAC#UNICASTADDR[47:0]) used to set the
Direction
This 48-bit wide tie-off is used to set the Ethernet MAC unicast
address used by the address filter block to see if the incoming
frame is destined for the Ethernet MAC.
Input
The address is ordered for the least significant byte in the register
to have the first byte transmitted or received; for example, an
Ethernet MAC address of 06-05-04-03-02-01 is stored in byte
[47:0] as 0x010203040506.
describes the Management Data Input/Output (MDIO) interface signals. The
Direction
Management clock derived from the host clock or
Output
PHYEMAC#MCLKIN.
When the host is not used, access to the PCS must be provided by
Input
an external MDIO controller. In this situation, the management
clock is an input to the core.
Signal from the physical interface for communicating the
Input
configuration and status. If unused, must be tied High.
Signal to output the configuration and command to the physical
Output
interface.
Output
The 3-state control to accompany EMAC#PHYMDOUT.
shows the data and control signals for the different modes. They are set from the
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Description
Description
Embedded Tri-Mode Ethernet MAC User Guide
UG074 (v2.2) February 22, 2010
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