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Integral Blocks
BLGR - Frame Size
The BLGR parameter specifies the maximum size of the data frame that can be exchanged
between a PLC and a CP during one pass of the data handling block (applies only to SYNCHRON).
Parameter
Type
Format
Data
KY
KY = 0,y
(byte)
y =7 to 254
*
See Table 11-4
**
The block uses the default parameter. (On the S5-115U, the frame size is set at 64 bytes).
Table 11-4. Ready Delay Times of the CPs and IPs
Communications
Processor
CP 524
CP 525
CP 526
CP 530
CP 535
CP 551
CP 552
IP 252
IP 246
IP 247
CP 527
CP 5430
CP 143
11-10
Frame Size
y =0
64
bytes **
y =1
16
bytes
y =2
32
bytes
y =3
64
bytes
y =4
128
bytes
y =5
256
bytes
y =6
512
bytes
same as for y=0
Ready Delay
Time in µs
1
3
3
3 to 130
3
3
3
10
1.5
1.5
3
1
3
Assignment
Execution Time
CPU 941 - 943
(SEND and RECEIVE)
(SEND and RECEIVE)
approx. 6.0 msec.
The execution time is as
follows:
approx. 3.0 msec.
- in the case of processing
without data inter-
approx. 4.5 msec.
change: approx. 0.9 ms
approx. 6.0 msec.
- in the case of processing
approx. 10.0 msec.
with data interchange:
Total execution time:
approx. 17.5 msec.
=4500 µs+Number of
approx. 30 msec.
bytes (1.7 µs+ready delay
time of the CP/IP*)
S5-115U Manual
Execution Time
CPU 944
EWA 4NEB 811 6130-02b
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