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PLC System Start-Up and Program Test
Outputting Signal States on a Display Screen
The display of signal states on a screen differs according to the following methods of represen-
tation:
STL:
Signal states are represented as a listing of information.
CSF/LAD:
Signal states are represented by different types of connecting lines as shown in Figure 4-3:
Signal state 1
Signal state 0
Signal state cannot be represented. (E.g., the signal state is outside the
range of the 20 operands that can be represented.)
Figure 4-3. Representation of Signal States on a Screen (for LAD and CSF)
Program-Dependent Signal Status Display "STATUS"
Use the "STATUS" test function to indicate the current signal states and the RLO of the individual
operands during program scanning.
You can also use this function to correct the program.
Note:
The PLC must be in the "RUN" mode for this test function.
Status processing can be interrupted by time interrupts and process interrupts. At the interrupt
point, the CPU ceases to collect data for status display and transfers only data with the value 0 to
the programmer instead of the data still required.
For this reason, it may occur that, when using time interrupts and process interrupts, only 0 will be
flagged in the status display of a block in the following cases for a sequence of operations of
varied length:
•
Result of logic operation RLO
•
Status/ACCUM 1
•
ACCUM 2
•
Status byte
•
Absolute memory address SAC. "?" then appears after SAC.
Interruptions to status processing have no effect on program processing. They simply give a clear
indication that the displayed data is no longer valid from the interrupt point onward.
4-10
S5-115U Manual
EWA 4NEB 811 6130-02b
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