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Interrupt Processing
Programming the RESTART Blocks
STL
L
KM
T
PW
The bits in the high-order byte (byte a in this example) that was loaded into ACCUM 1 with the
statement "L KM ab" correspond to the bit addresses of the eight input channels. If a bit is set to
"1", the interrupt is enabled for this channel.
The bits in the low-order byte indicate whether the interrupt on this channel is triggered on a
leading edge ("0") or on a trailing edge ("1").
Example: Triggering inputs 2, 4, and 6 on a leading edge. Triggering inputs 1, 3, and 5 on a
trailing edge.
Bit address of the input
=
indicates irrelevant bits, since the corresponding bits
in the high-order byte are set to "0" (no interrupt).
9-6
a b
Load a two-byte bit pattern into ACCUM 1.
(a: Bit pattern of the interrupt enable; b: Bit pattern of
the edge initiating the interrupt)
x
Transfer the information from ACCUM 1 to the module
(x is the module start address).
Interrupt enable
7
0 1 1 1 1 1 1 0
High-order byte
Description
Interrupt-generating edge
0
7
0 1 0 1 0 1
Low-order byte
EWA 4NEB 811 6130-02b
S5-115U Manual
0
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