Control Registers; Px Port Data Register; Px Port Enable Register - Epson S1C17M20 Technical Manual

Interrupt enable
PPORT provides interrupt enable bits (PxINTCTL.PxIEy bit) corresponding to each interrupt flag. An inter-
rupt request is sent to the interrupt controller only when the interrupt flag, of which interrupt has been enabled
by the interrupt enable bit, is set. For more information on interrupt control, refer to the "Interrupt Controller"
chapter.
Interrupt check in port group unit
When interrupts are enabled in two or more port groups, check the PINTFGRP.PxINT bit in the interrupt han-
dler first. It helps minimize the handler codes for finding the port that has generated an interrupt. If this bit is
set to 1, an interrupt has occurred in the port group. Next, check the PxINTF.PxIFy bit set to 1 in the port group
to determine the port that has generated an interrupt. Clearing the PxINTF.PxIFy bit also clears the PINTFGRP.
PxINT bit. If the port is set to interrupt disabled status by the PxINTCTL.PxIEy bit, the PINTFGRP.PxINT bit
will not be set even if the PxINTF.PxIFy bit is set to 1.

6.6 Control Registers

This section describes the same control registers of all port groups as a single register. For the register and bit con-
figurations in each port group and their initial values, refer to "Control Register and Port Function Configuration of
this IC."

Px Port Data Register

Register name Bit
PxDAT 15–8 PxOUT[7:0]
7–0 PxIN[7:0]
*1: This register is effective when the GPIO function is selected.
*2: The bit configuration differs depending on the port group.
*3: The initial value may be changed by the port.
Bits 15–8 PxOUT[7:0]
These bits are used to set data to be output from the GPIO port pins.
1 (R/W): Output high level from the port pin
0 (R/W): Output low level from the port pin
When output is enabled (PxIOEN.PxOENy bit = 1), the port pin outputs the data set here. Although
data can be written when output is disabled (PxIOEN.PxOENy bit = 0), it does not affect the pin status.
These bits do not affect the outputs when the port is used as a peripheral I/O function.
Bits 7–0 PxIN[7:0]
The GPIO port pin status can be read out from these bits.
1 (R): Port pin = High level
0 (R): Port pin = Low level
The port pin status can be read out when input is enabled (PxIOEN.PxIENy bit = 1). When input is
disabled (PxIOEN.PxIENy bit = 0), these bits are always read as 0.
When the port is used for a peripheral I/O function, the input value cannot be read out from these bits.

Px Port Enable Register

Register name Bit
PxIOEN 15–8 PxIEN[7:0]
7–0 PxOEN[7:0]
*1: This register is effective when the GPIO function is selected.
*2: The bit configuration differs depending on the port group.
Bits 15–8 PxIEN[7:0]
These bits enable/disable the GPIO port input.
1 (R/W): Enable (The port pin status is input.)
0 (R/W): Disable (Input data is fixed at 0.)
S1C17M20/M21/M22/M23/M24/M25
TECHNICAL MANUAL (Rev. 1.0)
Bit name Initial
0x00
0x00
Bit name Initial
0x00
0x00
Seiko Epson Corporation
Reset R/W
H0 R/W –
H0 R
Reset R/W
H0 R/W –
H0 R/W
6 I/O PORTS (PPORT)
Remarks
Remarks
6-7