Epson S1C17M20 Technical Manual page 303

0x5270–0x527a
Address Register name
0x5270 SPI1MOD
(SPIA Ch.1 Mode
Register)
0x5272 SPI1CTL
(SPIA Ch.1 Control
Register)
0x5274 SPI1TXD
(SPIA Ch.1 Transmit
Data Register)
0x5276 SPI1RXD
(SPIA Ch.1 Receive
Data Register)
0x5278 SPI1INTF
(SPIA Ch.1 Interrupt
Flag Register)
0x527a SPI1INTE
(SPIA Ch.1 Interrupt
Enable Register)
0x5300–0x530a
Address Register name
0x5300 SNDCLK
(SNDA Clock Control
Register)
0x5302 SNDSEL
(SNDA Select
Register)
0x5304 SNDCTL
(SNDA Control
Register)
0x5306 SNDDAT
(SNDA Data
Register)
S1C17M20/M21/M22/M23/M24/M25
TECHNICAL MANUAL (Rev. 1.0)
APPENDIX A LIST OF PERIPHERAL CIRCUIT CONTROL REGISTERS
Bit Bit name
15–12 –
11–8 CHLN[3:0]
7–6 –
5 PUEN
4 NOCLKDIV
3 LSBFST
2 CPHA
1 CPOL
0 MST
15–8 –
7–2 –
1 SFTRST
0 MODEN
15–0 TXD[15:0]
15–0 RXD[15:0]
15–8 –
7 BSY
6–4 –
3 OEIF
2 TENDIF
1 RBFIF
0 TBEIF
15–8 –
7–4 –
3 OEIE
2 TENDIE
1 RBFIE
0 TBEIE
Bit Bit name
15–9 –
8 DBRUN
7 –
6–4 CLKDIV[2:0]
3–2 –
1–0 CLKSRC[1:0]
15–12 –
11–8 STIM[3:0]
7–3 –
2 SINV
1–0 MOSEL[1:0]
15–9 –
8 SSTP
7–1 –
0 MODEN
15 MDTI
14 MDRS
13–8 SLEN[5:0]
7–0 SFRQ[7:0]
Seiko Epson Corporation
Synchronous Serial Interface (SPIA) Ch.1
Initial Reset R/W
0x0 – R
0x7 H0 R/W
0x0 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
0x00 – R
0x00 – R
0 H0 R/W
0 H0 R/W
0x0000 H0 R/W
0x0000 H0 R
0x00 – R
0 H0 R
0x0 – R
0 H0/S0 R/W
0 H0/S0 R/W
0 H0/S0 R
1 H0/S0 R
0x00 – R
0x0 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 H0 R/W
Sound Generator (SNDA)
Initial Reset R/W
0x00 – R
0 H0 R/W
0 – R
0x0 H0 R/W
0x0 – R
0x0 H0 R/W
0x0 – R
0x0 H0 R/W
0x00 – R
0 H0 R/W
0x0 H0 R/W
0x00 – R
0 H0 R/W
0x00 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0x00 H0 R/W
0xff H0 R/W
Remarks
–
–
–
–
–
Cleared by writing 1.
Cleared by reading the
SPI1RXD register.
Cleared by writing to the
SPI1TXD register.
–
Remarks
–
–
–
–
AP-A-27