Mac - Epson S1C17M20 Technical Manual

Example:
ld.cw %r0,0x02 ; Sets the mode (initialize mode 2).
ld.cf %r0,%r1 ; Set the dividend {%r0, %r1} to the operation result register 0.
ld.cw %r0,0x08 ; Sets the mode (unsigned division mode and 16 low-order bits output mode 0).
ld.ca %r0,%r1 ; Performs "res0[31:0] (quotient), res1[31:0] (remainder) = res0[31:0] ÷ {%r0[15:0],
ld.ca %r1,%r0 ; Loads the 16 low-order bits of the result (quotient) to %r1.
ld.cw %r0,0x13 ; Sets the mode (operation result read mode and 16 high-order bits output mode 0).
ld.ca %r2,%r0 ; Loads the 16 high-order bits of the result (quotient) to %r2.
ld.cw %r0,0x23 ; Sets the mode (operation result read mode and 16 low-order bits output mode 1).
ld.ca %r3,%r0 ; Loads the 16 low-order bits of the result (remainder) to %r3.
ld.cw %r0,0x33 ; Sets the mode (operation result read mode and 16 high-order bits output mode 1).
ld.ca %r4,%r0 ; Loads the 16 high-order bits of the result (remainder) to %r4.

20.5 MAC

The MAC (multiplication and accumulation) function performs "A (32 bits) = B (16 bits) × C (16 bits) + A (32
bits)."
The following shows a procedure to perform a MAC operation:
1. Set the initial value (A) to the operation result register 0.
• To clear the operation result registers (A = 0):
Set the mode to 0x00 (initialize mode 0). (It is not necessary to send 0x00 to COPRO2 with another instruc-
tion.)
• To load a 16-bit value to the operation result register 0:
Set the operation mode to 0x01 (initialize mode 1) and then send the initial value (16 bits) to COPRO2 us-
ing a "ld.cf" instruction.
• To load a 32-bit value to the operation result register 0:
Set the operation mode to 0x02 (initialize mode 2) and then send the initial value (32 bits) to COPRO2 us-
ing a "ld.cf" instruction.
2. Set the mode to 0x06 (unsigned MAC, 16 low-order bits output mode 0) or 0x07 (signed MAC, 16 low-order
bits output mode 0).
3. Repeat sending the 16-bit multiplicand (B) and 16-bit multiplier (C) to COPRO2 the number of times required
using a "ld.ca" instruction.
4. Read the one-half result (16 low-order bits = A[15:0]) and the flag status.
5. Set the mode to 0x13 (operation result read, 16 high-order bits output mode).
6. Read another one-half result (16 high-order bits = A[31:16]).
S1C17 Core
S1C17M20/M21/M22/M23/M24/M25
TECHNICAL MANUAL (Rev. 1.0)
%r1[15:0]}" and loads the 16 low-order bits of the result (quotient) to %r0.
COPRO2
Argument 2
Argument 1
Operation result
Coprocessor
output
Flag output
Figure 20.5.1 Data Path in Initialize Mode
Seiko Epson Corporation
20 Multiplier/Divider (COPRO2)
16 bits
32 bits
Operation result
register 1 register 0
Selector
20-5