Input Pins And External Connection; Input Pins; External Connection; Clock Settings - Epson S1C17M20 Technical Manual

10 SUPPLY VOLTAGE DETECTOR (SVD3)

10.2 Input Pins and External Connection

10.2.1 Input Pins

Table 10.2.1.1 shows the SVD3 input pins.
Pin name
EXSVD0
EXSVD1
If the port is shared with the EXSVD0/1 pin and other functions, the EXSVD0/1 function must be assigned to the
port before SVD3 can be activated. For more information, refer to the "I/O Ports" chapter.

10.2.2 External Connection

Figure 10.2.2.1 Connection between EXSVD0/1 Pin and External Power Supply
R resistance value must be determined so that it will be sufficiently smaller than the EXSVD input impedance
EXT
R . For the EXSVD0/1 pin input voltage range and the EXSVD input impedance, refer to "Supply Voltage De-
EXSVD
tector Characteristics" in the "Electrical Characteristics" chapter.

10.3 Clock Settings

10.3.1 SVD3 Operating Clock

When using SVD3, the SVD3 operating clock CLK_SVD3 must be supplied to SVD3 from the clock generator.
The CLK_SVD3 supply should be controlled as in the procedure shown below.
1. Write 0x0096 to the MSCPROT.PROT[15:0] bits. (Remove system protection)
2. Enable the clock source in the clock generator if it is stopped (refer to "Clock Generator" in the "Power Supply,
Reset, and Clocks" chapter).
3. Set the following SVDCLK register bits:
- SVDCLK.CLKSRC[1:0] bits
- SVDCLK.CLKDIV[2:0] bits
4. Write a value other than 0x0096 to the MSCPROT.PROT[15:0] bits. (Set system protection)
The CLK_SVD3 frequency should be set to around 32 kHz.

10.3.2 Clock Supply in SLEEP Mode

When using SVD3 during SLEEP mode, the SVD3 operating clock CLK_SVD3 must be configured so that it will
keep supplying by writing 0 to the CLGOSC.xxxxSLPC bit for the CLK_SVD3 clock source.
If the CLGOSC.xxxxSLPC bit for the CLK_SVD3 clock source is 1, the CLK_SVD3 clock source is deactivated
during SLEEP mode and SVD3 stops with the register settings maintained at those before entering SLEEP mode.
After the CPU returns to normal mode, CLK_SVD3 is supplied and the SVD3 operation resumes.
10-2
Table 10.2.1.1 SVD3 Input Pins
I/O* Initial status*
A A (Hi-Z)
A A (Hi-Z)
External power
supply/regulator
etc.
EXSVD0/1
R
EXT
Seiko Epson Corporation
External power supply voltage detection pin 0
External power supply voltage detection pin 1
* Indicates the status when the pin is configured for SVD3.
SVD3
SVD
analog block
R
EXSVD
V
SS
(Clock source selection)
(Clock division ratio selection = Clock frequency setting)
Function
S1C17M20/M21/M22/M23/M24/M25
TECHNICAL MANUAL (Rev. 1.0)