APPENDIX A LIST OF PERIPHERAL CIRCUIT CONTROL REGISTERS
Address
Register name
0x4046 CLGOSC1
(CLG OSC1 Control
Register)
0x4048 CLGOSC3
(CLG OSC3 Control
Register)
0x404c CLGINTF
(CLG Interrupt Flag
Register)
0x404e CLGINTE
(CLG Interrupt Enable
Register)
0x4050 CLGFOUT
(CLG FOUT Control
Register)
0x4080–0x4094
Address
Register name
0x4080 ITCLV0
(ITC Interrupt Level
Setup Register 0)
0x4082 ITCLV1
(ITC Interrupt Level
Setup Register 1)
AP-A-2
Bit
Bit name
15
–
14
OSDRB
13
OSDEN
12
OSC1BUP
11
OSC1SELCR
10–8 CGI1[2:0]
7–6 INV1B[1:0]
5–4 INV1N[1:0]
3–2 –
1–0 OSC1WT[1:0]
15–12 –
11–10 OSC3FQ[1:0]
9
OSC3MD
8
–
7–6 –
5–4 OSC3INV[1:0]
3
OSC3STM
2–0 OSC3WT[2:0]
15–8 –
7
–
6
(reserved)
5
OSC1STPIF
4
OSC3TEDIF
3
–
2
OSC3STAIF
1
OSC1STAIF
0
IOSCSTAIF
15–8 –
7
–
6
(reserved)
5
OSC1STPIE
4
OSC3TEDIE
3
–
2
OSC3STAIE
1
OSC1STAIE
0
IOSCSTAIE
15–8 –
7
–
6–4 FOUTDIV[2:0]
3–2 FOUTSRC[1:0]
1
–
0
FOUTEN
Bit
Bit name
15–11 –
10–8 ILV1[2:0]
7–3 –
2–0 ILV0[2:0]
15–11 –
10–8 ILV3[2:0]
7–0 –
Seiko Epson Corporation
Initial
Reset
R/W
0
–
R
1
H0
R/WP
0
H0
R/WP
1
H0
R/WP
0
H0
R/WP
0x0
H0
R/WP
0x2
H0
R/WP
0x1
H0
R/WP
0x0
–
R
0x2
H0
R/WP
0x0
–
R
0x1
H0
R/WP
0
H0
R/WP
0
–
R
0x0
–
R
0x3
H0
R/WP
0
H0
R/WP
0x6
H0
R/WP
0x00
–
R
0x0
–
R
0
H0
R
0
H0
R/W
0
H0
R/W
0
–
R
0
H0
R/W
0
H0
R/W
0
H0
R/W
0x00
–
R
0
–
R
0
H0
R
0
H0
R/W
0
H0
R/W
0
–
R
0
H0
R/W
0
H0
R/W
0
H0
R/W
0x00
–
R
0
–
R
0x0
H0
R/W
0x0
H0
R/W
0
–
R
0
H0
R/W
Interrupt Controller (ITC)
Initial
Reset
R/W
0x00
–
R
0x0
H0
R/W
0x00
–
R
0x0
H0
R/W
0x00
–
R
0x0
H0
R/W
0x00
–
R
S1C17M20/M21/M22/M23/M24/M25
Remarks
–
–
–
Cleared by writing 1.
–
Cleared by writing 1.
–
–
Remarks
–
Port interrupt (ILVPPORT)
–
Supply voltage detector
interrupt (ILVSVD3)
–
Clock generator interrupt
(ILVCLG)
–
TECHNICAL MANUAL (Rev. 1.0)