Epson PX-8 Technical Manual page 173

REV.-A
3.2.7 I/O Selector
The I/O selector (IC "5C") is the RAM disk CPU I/O address decoder which is used for handshak-
ing in the interface. Fig. 3-37 shows the circuit and table 4-7 lists its decoding logics.
-
Jr
l
nOK~8
IC "5C" Logic Table
,5
"
,)
'1
"
0
9
~
~
4
)
1
,
AI
0
(I
Z-BO (CMOS)
eLK
~
I
07 '
4
)
1
I
0
~
~
.
6
,
7
,
~
1 )
"-i
6C
, I
H 49
'0
":
..
,
INPUTS
t---
SELECT
TROGE DATA
lYO
B A lG lC
X
X H X H
L L L
H L
L H L H H
H L L H H
H
H
L
H H
X X X L H
58~t
2t111.
13 )
, ,s
lAB
UAGJ
I HISS 1 (5()
6
I 2 J
~
I 1)
v'rl' 'fH1
Fig.3-37 I/O Selector Circuit
IC "5C" has six outputs whose functions are listed in table 3-8.
Table 3-8 I/O Selector Logics
Read/Write I/O Port Address Supplied To
01 78
READ
03
98
00 12C,88
01 13C
WRITE
02 4C
03
4C
3-27
OUTPUTS
INPUTS OUTPUTS
SELECT TROGE DATA
2YO 2Yl 2Y2 2Y3
lYl lY2 lY3
2C 8 A 2G
H H H
X X H X H
H H H
H H H L L L
L L H H H
L H H L H L L
H L H H
H L H H L L L H
H L H
H H L H
H L L H H
H L
H H H X
X X H H H H H
AO A1 RD WR IORQ
A 8 1 2 1 2
C
C G G
1Y (5C)
2Y
01(R) 03<R)
oa.w)
02rM
01(W) 03(W)
Function
Read J1 and SW1 status.
Read data or command from input
register.
Write data to output register.
Program Reset output signal.
RAM bank 0/1 control
RAM bank 2 control