Epson PX-8 Technical Manual page 147

REV.-A
3.1 M
icrocassette
The microcassette tape is controlled by the 6303 slave CPU. The unit requires a comparatively
large power supply because of the mechanical functions it performs. It is powered only when
used. Fig. 3-1 is a block diagram illustrating signal flow to and from the microcassette.
SLAVE
A "-
V-
I"
CPU
GAH40S )
MMC board
'-. ' "
6303
v
(
~
' "
, /
Microcassette
I
....
mechanism
~
I
I
Power supply 0
I
V-
' "
'-.
I
,/
MAPLE BOARD
Fig.3-1 Microcassette Tape Operation Control Block Diagram
3.1.1 Slave CPU Functions
The 6303 slave CPU directly controls all microcassette tape operations using the following sig-
nals:
HSW: Indicates the current position of the read/write head (LOAD/ UNLOAD).
WE: Indicates whether the microcassette is write-enabled.
(detects the presence of the microcassette write inhibit tab).
ERAH: Erase signal.
HMT: Head pinch motor drive signal.
0: Write data.
3.1.2 Gate Array Functions
The gate array issues or accepts the following signals under the control of the slave CPU:
MTA - MTC: Capstan motor drive control signal
CNTR: Tape count detection signal (photo-reflector detection signal)
RDMC: Read data
SWMC: MMC board and mechanism operation power control signal
3.1.3 Microcassette Tape Data Format
Data are recorded on a microcassette tape in blocks of 256 bytes and all cassette tapes are
accessed in blocks. Fig. 3-2 illustrates the structure of a data block.
3-1