Epson PX-8 Technical Manual page 171

REV.-A
2. Command decoder
Four signals are generated by IC "14C" from either address supplied from the address decoder
-
- -
and the RD and WR signals as shown in fig. 3-35.
I/O
ADDRESS
f
R
I
l
IN TACK
D~TA ~ET
81H
10.
j'~C\',B
SOH
13.
...!2l1~C
I
5
J'~L
»&-
~
~
I H
B
48 H
12~~B
IM.2 13
M4
rlr
5
R21
R22
3.3K.2
35~7
)
~
. / . /
R W
D R
eNI
!
S TAT\h READ
T
~fl'
T£
DATA WRITE
l~
K.
B
13C!I ,6
I
~
H . /
9V
~
2~
~
l
~f-
l
~
W 12
p"-~
2
D
12
p"-
I
D(l6C)O
3
(16C)Q 5 D(15C) Q
3
D(15ClJ
5
CK
CK C~
CK
H74 H74
H74 H74
8t-
*
?r
*
rfr
~
' - - - .
9 10
H
3C
B
-
Fig. 3-35
The four I/O read/write signals provide the functions listed in table 3-7.
Table. 3-7 Command Decoder Signals
I/O Addrss RD/WR signal Generated signal Function
-
RD Status Read Read RAM disk status to Main Frame
81 (H)
-
WR Command Write Write a command from Main Frame to
RAM disk.
-
RD Data Read Read data from RAM disk to Main Frame
80(H)
WR Data Write
Write data from Main Frame to RAM disk.
Unlike the other three, the Status Read signal reads the RAM disk status register irrespective of
the RAM disk CPU operation, directly controlling the register read access and data bus drive. The
other signals cannot accomplish their functions without intervention by the RAM disk CPU. In ad-
dition, any of these signals cannot be directly transferred between the Main Frame and RAM disk
CPUs because they are operating asynchronously. Thus, a means is required to temporarily store
the signals. This is accomplished by the circuit consisting of the two ICs "15C" and "16C" both of
which contain two D-type FF having Preset (P) and Clear (C) terminals. Each of four signals is con-
nected to the Preset terminal of one of the four D-type FFs. Once a signal activated low, the corre-
sponding FF is set and the
Q
output remains high until either of the following occurs:
3-25