Epson PX-8 Technical Manual page 158

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3.1.7.2 Circuit Operations
Read signal
o--f
t----..-..... --{
Fig. 3-16 illustrates the write circuit. To
write data, the direction of the write cur-
rent through the read/write head is alter-
nated by repeating charging and dischar-
ging the electolytic capacitor C12.
VLSW
GND 3 >-----~-~
4
WD
R40
lOOK
lOOK
RIB
02
12
r--
06
MAI51A
IeS
aI\.I\I\ .
.....:::.-~
1/6 4069
/ ' lOOK '--MAPLE
/ ' I
board
Sub CPU 6303 P21
ell
.015
MAI53
Fig.3-16
REV.-A
A series of actual data bits is written on tape by alternating current to enable or disable, depen-
ding on the value of each bit, the pull-up of the input to pin 5 of IC5 to the VLSW voltage line
through R4. The WD signal, which represents the logical value 0 or 1 of each data bit, usually va-
ries its level and appears as shown in Fig. 3-17; it looks like a train of pulses.
{
ON (1) bit: 2 kHz cycle
OFF (0) bit: 1 kHz cycle
ON
Bit
(Logical 1)
OFF
Bit
(LogcaIO)
Fig. 3-17 Write Signal (WD) Pulse Train
ON
Bit
* The flag bit is also written for each data byte and the write signal appears as shown in Fig. 3-18.
BIT
7
OFF
I ..
I
BIT I BIT
6 5
OFF OFF
1 KHz
I- "I
I 1
OOO~sec
I
I
I
I
I
I
I
U
I
I
I
BIT
BIT
I
4 3
ON OFF
BIT
2
ON
2KHz
~
I 500psec
I
I I
I
BIT
I BIT
0
OFF
OFF
.1
1 byte (HEX 14)
Fig. 3-18 Sample Write Signal Waveform
3-12
I
L
I
FLAG BIT
I
I
I
I
ON
/