Multi-Processor Interrupt Controller (Mpic); Mpic Features - Motorola MVME5100 Programmer's Reference Manual

Hawk PCI Host Bridge & Multi-Processor Interrupt Controller
2
Function
PPC:PCI Clock Ratio

Multi-Processor Interrupt Controller (MPIC)

MPIC Features:

2-50
Table 2-15. PHB Hardware Configuration (Continued)
Sample Pin(s)
RD[10:12]
The MPIC is a multi-processor structured intelligent interrupt controller.
MPIC programming model
Supports two processors
Supports 16 external interrupts
Supports 15 programmable Interrupt & Processor Task priority
levels
Supports the connection of an external 8259 for ISA/AT
compatibility
Distributed interrupt delivery for external I/O interrupts
Direct/Multicast interrupt delivery for Interprocessor and timer
interrupts
Four Interprocessor Interrupt sources
Four timers
Processor initialization control
Sampled Meaning
State
000 Reserved
100
010
110
001
101 Reserved
011
111 Reserved
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