Ppc Error Attribute Register - Motorola MVME5100 Programmer's Reference Manual

Hawk PCI Host Bridge & Multi-Processor Interrupt Controller

PPC Error Attribute Register

2
Address
Bit
0 1 2 3 4 5 6 7 8 9
Name
Operation
Reset
2-84
The Error Attribute Register (EATTR) captures attribute information on
the various errors that the PHB can detect. If the XDPE, PPER or PSER
bits are set in the ESTAT register, the contents of the EATTR register are
zero. If the XBTO bit is set the register is defined by the following table:
1
0
R
$00
XIDx PPC Master ID. This field contains the ID of the PPC
master which originated the transfer in which the error
occurred. The encoding scheme is identical to that used in
the GCSR register.
TBST Transfer Burst. This bit is set when the transfer in which
the error occurred was a burst transfer.
TSIZx Transfer Size. This field contains the transfer size of the
PPC transfer in which the error occurred.
TTx Transfer Type. This field contains the transfer type of the
PPC transfer in which the error occurred.
$FEFF002C
1 1 1 1 1 1 1 1 1
1 2 3 4 5 6 7 8 9
R
$00
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2 2 2 2 2 2 2 2 2
0 1 2 3 4 5 6 7 8
EATTR
2 3 3
9 0 1