Rom Speed Attributes Registers - Motorola MVME5100 Programmer's Reference Manual

System Memory Controller (SMC)
3

ROM Speed Attributes Registers

Address
Bit
Name
Operation
Reset
3-58
rom b we When rom b we is set, writes to Block B ROM/Flash are
enabled. When rom b we is cleared they are disabled.
Refer back to
READ ZERO READ ZERO
X
rom_a_spd0,1 rom_a_spd0,1 determine the access timing used for
ROM/Flash Block A. The encoding of these bits are
shown in
The device access times shown in the table are
conservative and allow time for buffers on address,
control, and data signals. For more accurate information
see the section entitled Timing Specifications for
ROM/Flash Signals further on in this manual, along with
the section titled ROM/Flash Read Timing Diagram.
Table 3-13 for more details.
$FEF80060
READ ZERO
X X
Table 3-15.
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