CONFIG_DATA Register
The description of the CONFIG_DATA register is also presented in three
perspectives; from the PCI bus, from the PPC Bus in Big Endian mode,
and from the PPC bus in Little Endian mode. Note that the view from the
PCI bus is purely conceptual, since there is no way to access the
CONFIG_DATA register from the PCI bus.Conceptual perspective from
the PCI bus:
Offset
$CFF
Bit
3
3
2
2
1
0
9
8
Name
Data 'D'
Operation
R/W
Reset
n/a
Perspective from the PPC bus in Big Endian mode:
Offset
$CFC
Bit (DL)
0 1 2 3 4 5 6 7 8 9
Name
Data 'A'
Operation
R/W
Reset
n/a
Perspective from the PPC bus in Little Endian mode:
Offset
$CF8
Bit (DH)
0 1 2 3 4 5 6 7 8 9
Name
Data 'D'
Operation
R/W
Reset
n/a
http://www.motorola.com/computer/literature
$CFE
2
2
2
2
2
2
2
2
1
7
6
5
4
3
2
1
0
9
CONFIG_DATA
Data 'C'
R/W
n/a
$CFD
1
1
1
0
1
2
CONFIG_DATA
Data 'B'
R/W
n/a
$CF9
1
1
1
0
1
2
CONFIG_DATA
Data 'C'
R/W
n/a
$CFD
1
1
1
1
1
1
1
1
1
8
7
6
5
4
3
2
1
0 9 8 7 6 5 4 3 2 1 0
Data 'B'
R/W
n/a
$CFE
1
1
1
1
1
1
1
2
2
3
4
5
6
7
8
9
0
1
Data 'C'
R/W
n/a
$CFA
1
1
1
1
1
1
1
2
2
3
4
5
6
7
8
9
0
1
Data 'B'
R/W
n/a
Registers
$CFC
Data 'A'
R/W
n/a
$CFF
2
2
2
2
2
2
2
2
3
2
3
4
5
6
7
8
9
0
Data 'D'
R/W
n/a
$CFB
2
2
2
2
2
2
2
2
3
2
3
4
5
6
7
8
9
0
Data 'A'
R/W
n/a
2-107
2
3
1
3
1