HP 16550A User Reference page 50

100-mhz state/500-mhz timing logic analyzer
Hide thumbs Also See for 16550A:
Table of Contents

Advertisement

The Format Menu
Timing Acquisition Mode Field (Timing only)
Transitional Half Channel 250 MHz Mode
The total memory depth is 8 Kbytes with a charmel width of 17 charmels on
one pod. The pod used within the pod pair is selectable. Data is sampled for
new transitions every 4 ns.
Transitional timing running at 250 MHz is the same as the 125 MHz mode,
except that two single pod data samples ( 1 7 bits x 2
=
34 bits) are stored
I
instead of one full pod pair data sample (34 bits). This is because in half
charmel mode, data is multiplexed into the sequencer pipeline in two 17 bit
samples. The first 17 bit sample is latched, the next 1 7 bit sample is sent
down the pipeline along with the latched 1 7 bit sample.
This operation keeps the pipeline frequency down to 125 MHz. It should be
noted that the transition detector still looks at a full 34 bits. This means it is
looking at two samples at a time instead of one. In this mode, between 682
and 4094 transitions are stored.
Minimum Transitions Stored The following example shows what data
is stored from a data stream with transitions that occur at a slow rate
(more than 24 ns apart).
~~ ~~ERN
l
Bit 3
m
bill
_Br_t 2 - - , - - - , - - - , - - , . - - - - . - , - - - - - - - , - - - , - - - , - - - - , - - - - - - - - - -
Time- Tags,
4
nsec
(32 bit)
-Brt_1 _ _ _ _
4
I
I
4
I
I
I
10
11
12
I
I
I
I
I
I
I
WHEN DATA
--~-'~~~'
- + - - '
~' ~~~-~~~~~~~~~-+--~~~
IS SAMPLED
:
:
I
:
I
I
I
I
I
I
I
WHEN DATA (17 bits)
--~-+--~--+~--1------~----+-~--+---------
IS LATCHED
(101)
<101)
: <OOOJ
WHEN DAT A
(17
bits)
IS STORED WITH
LATCHED DAT A (17 bits)
TOT AL (34 bits)
I
(101)
(QOOJ
(000)
Minimum Transitions Stored
<000)
<001)
(000l
(001)
4-9

Advertisement

Table of Contents
loading

Table of Contents