HP 16550A User Reference page 49

100-mhz state/500-mhz timing logic analyzer
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The Format Menu
Timing Acquisition Mode Field (Timing only)
Minimum. Transitions Stored Normally, transitions occur at a
relatively slow rate.
A
rate slow enough to insure at least one sample
with no transitions between the samples with transitions. This is
illustrated below with time-tags 2, 5, 7, and 14. When transitions happen
at this rate, two cycles are stored for every transition. This means that
with 2 Kbytes of memory, 1 Kbytes of transitions are stored. You must
subtract 1, which is necessary for a starting point, for a minimum of 1023
stored transitions.
Maximum Transitions Stored
If
transitions occur at a fast rate, such
that there is a transition at each sample point, only one sample is stored
for each transition as shown by time-tags 17 through 21 below.
If
this
continues for the entire trace, the number of transitions stored is
2 Kbytes. Again, you must subtract the starting point sample which then
yields a maximum of 204 7 stored transitions.
In most cases a transitional timing trace is stored by a mixture of the
minimum and maximum cases. Therefore, the actual number of transitions
stored
will
be between 1023 and 2047.
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~~~~ERN
(
"T
~
1
i
'-r---------...,c-------r------,-1~m~:~- ~ ==========-=
-
----~--------------"l:l+Jll
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(34 bit)
Bit 2 I
.
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Bit 1 I
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Time-Tag.
8
nsec:.
(32 bill
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8
9
10
11
12
13
WHEN DAT A
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22
23
24
IS SAMPLED
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~H~~0~~6A -~--1-~I ~1-~I ------~1-~I --1-~l -l-~~l-~---
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01660816
Storing Time-tags and Transitions
4-8

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