Clock And Data Signals - IBM AT 5170 Technical Reference

Clock and Data Signals
The keyboard and system communicate over the
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clock
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and
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data
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lines. The source of each of these lines is an
open-collector device on the keyboard that allows either the
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keyboard or the system to force a line to a negative level. When
no communication is occurring, both the
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clock
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and
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data
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lines
are at a positive level.
Data transmissions to and from the keyboard consist of 11-bit
data streams that are sent serially over the
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data
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line. The
following figure shows the structure of the data stream.
Bit Function
1 Start bit (always 1)
2 Data b t 0 (least-significant)
3
Data b t 1
4 Data b t 2
5
Data b t 3
6 Data b t 4
7
Data b t 5
8
Data b t 6
9
Data b t 7 (most-significant)
10 Parity bit (always odd)
11
Stop bit (always 1)
The parity bit is either 1 or 0, and the eight data bits plus the
parity bit always equals an odd number.
When the system sends data to the keyboard, it forces the
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data
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line to a negative level and allows the
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clock
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line to go to a
positive level.
When the keyboard sends data to, or receives data from the
system, it generates the
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clock
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signal to time the data. The
system can prevent the keyboard from sending data by forcing the
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clock
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line to a negative level; the
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data
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line may go high or low
during this time.
During the BAT, the keyboard allows the
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clock
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and
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data
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~
lines to go to a positive level.
4-12 Keyboard